The topic dealt with in this part describes the structure of multilayer ceramic capacitors and the processes involved in the production of these capacitors. The most basic structure used by capacitors to store electrical charge consists of a pair of electrodes separated by a dielectric, as is shown in Fig. 1 below.
Capacitor design (dielectric thickness, number of layers, and cover layer thickness) is selected for any requirement by a computer, which is programmed to calculate the best design for the electrical parameters required (capacitance, working voltage, dielectric withstanding voltage, and I.R.).
The most basic structure used by capacitors to store electrical charge consists of a pair of electrodes separated by a dielectric, as is shown in Fig. 1 below. One of the indicators used to express the performance of a capacitor is how much electrical charge it can store.
In application, the AC voltage across the chip capacitor may in some cases well exceed the 1.0 ± .02 Vrms test voltage, generating a substantial increase in capacitance.
One of the most important parameters in evaluating a high frequency chip capacitor is the Q factor, or the related Equivalent Series Resistance (ESR). In theory, a “perfect” capacitor would exhibit an ESR of 0 (zero) ohms and would be purely reactive with no real (resistive) component.
In recent years, multilayer ceramic capacitors have become increasingly smaller and their capacitance has increased while their fabrication processes have been improved; for instance, the dielectric layers have become thinner and the precision with which the layers are stacked has been enhanced. Person in charge: Murata Manufacturing Co., Ltd. Y.G